[755-1] Mentor Tutotials

[Konstantinos Dovrolis <dovrolis@cs.wisc.edu>]

Hi all,

The first three tutorials for the tools that we will use
in this course are on the Web page. The first is just
some simple instructions for running Mentor, the second
explains the use of Design Manager, and the third covers
logic design using Design Architect, and digital simulations
using QuickSim. Note that even if you have used these tools
before, some things will be different for this course.

Specifically, we are going to use a certain library of
standard cells called scn08hp (because it has been designed
from HP for a 0.8um technology). Also, the digital
simulations are not going to be exactly.. digital, because
the components of this library are backannotated with
timing information extracted from their physical layout.
What this means simply, is that the delay and the rise/fall
times of these gates will depend on their load (fanout),
and in this sense, the simulations that you will be doing
with Quicksim stand somewhere between the digital and analog
world.

Please note that you can only run the Mentor tools from
the SUN workstations of the instructional labs (the novas
are strongly suggested compared to the sols). You can
of course work from another machine, "xhosting" a 
SUN workstation, but in that case expect some performance hit.

Please let me know for any problems that you have with the
tutorials. There may be things that need further clarification.
Also note that I have plenty of office hours, so if you have
a hard time starting with the tools we can try it together.

Cheers

Constantinos